An Efficient Memristor based Image Encryption Algorithm

Contemporary inquisition on numerous schemas of FPGA endeavoring curtailment of power consumption effectuates the inference that one of the utmost expansively used contexts is Static Random Access Memory (SRAM) based structures. This paper addresses the limitations associated with SRAM such as low density, longer routing path, increased propagation delay, increased peak power consumption rate as well as high value of average power consumption and proposes an alternative methodology for image encryption schemes. This paper proposes Neoteric Memristor based FPGA design to achieve high degree of correlation measure. A comparison study between conventional encryption algorithm and the results attained by this proposed corroborates the efficacy of the suggested method